The disclosure is directed to a power drop reset circuit which includes not limited to: a first step circuit configured to detect a change of a power supply voltage per unit of time and transmit an enable signal in response to the first step circuit having determined that the change of the power supply voltage per unit of time has dropped below zero, wherein the first step circuit does not consume any current when the Vcc change per unit of time is greater than or equal to zero; and a second step circuit electrically connected to the first step circuit and configured to detect the Vcc in response to having received the enable signal and generate a power drop reset signal in response to having determined that the Vcc has dropped below a predetermined operating voltage, wherein the second step circuit consumes an operating current after receiving the enable signal.