Compact Single Photon Avalanche Diode (SPAD) array structures are described. An on board common trigger circuit is used for two or more SPAD structures. The common trigger includes a compact counter and flash memory constructed adjacent two or more SPAD structures. Triggering of a SPAD latches the value of the counter and the value is stored in the memory along with the ID of the triggering SPAD. The counter continues counting, and if another SPAD subsequently triggers, the counter is again latched and the value is stored in the memory along with the ID of the subsequently triggering SPAD. The memory can be read and the triggering circuit reset. Methods for designing compact SPAD structures, a compact active quenching circuit and a compact 16 bit counter are described.