Invention Grant
- Patent Title: Techniques for secure-chip memory for trusted execution environments
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Application No.: US15600666Application Date: 2017-05-19
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Publication No.: US10706143B2Publication Date: 2020-07-07
- Inventor: Alpa T. Narendra Trivedi , Siddhartha Chhabra
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F7/04
- IPC: G06F7/04 ; G06F21/53 ; G06F21/57 ; G06F21/62 ; G06F21/72 ; G06F21/78

Abstract:
Techniques for secure-chip memory for trusted execution environments are described. A processor may include a memory configured to interface with a trusted execution environment. The processor may be configured to indicate to a trusted execution environment that the memory supports dedicated access to the trusted execution environment. The processor may receive an instruction from the trusted execution environment. The processor may enforce an access control policy of an interface plugin to limit access of the memory by the trusted execution environment to a partition of the memory associated with the trusted execution environment. Other embodiments are described and claimed.
Public/Granted literature
- US20180336342A1 TECHNIQUES FOR SECURE-CHIP MEMORY FOR TRUSTED EXECUTION ENVIRONMENTS Public/Granted day:2018-11-22
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