Invention Grant
- Patent Title: 3D NAND structures including group III-N material channels
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Application No.: US16303485Application Date: 2016-06-30
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Publication No.: US10727241B2Publication Date: 2020-07-28
- Inventor: Sansaptak Dasgupta , Prashant Majhi , Han Wui Then , Marko Radosavljevic
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Finch & Maloney PLLC
- International Application: PCT/US2016/040260 WO 20160630
- International Announcement: WO2018/004581 WO 20180104
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L27/11556 ; H01L29/08 ; H01L29/20 ; H01L29/788 ; H01L29/36 ; H01L29/423 ; H01L21/02 ; H01L29/10 ; H01L21/28 ; H01L21/311 ; H01L21/3213 ; H01L29/205

Abstract:
Techniques are disclosed for forming three-dimensional (3D) NAND structures including group III-nitride (III-N) material channels. Typically, polycrystalline silicon (poly-Si) channels are used for 3D NAND structures, such as 3D NAND flash memory devices. However, using III-N channel material for 3D NAND structures offers numerous benefits over poly-Si channel material, such as relatively lower resistance in the channel, relatively higher current densities, and relatively lower leakage. Therefore, using III-N channel material enables an increased number of floating gates or storage cells to be stacked in 3D NAND structures, thereby leading to increased capacity for a given integrated circuit footprint (e.g., increased GB/cm2). For instance, use of III-N channel material can enable greater than 100 floating gates for a 3D NAND structure. Other embodiments may be described and/or disclosed.
Public/Granted literature
- US20200119030A1 3D NAND STRUCTURES INCLUDING GROUP III-N MATERIAL CHANNELS Public/Granted day:2020-04-16
Information query
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