Invention Grant
- Patent Title: Asymmetric performance multicore architecture with same instruction set architecture
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Application No.: US16103798Application Date: 2018-08-14
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Publication No.: US10740281B2Publication Date: 2020-08-11
- Inventor: Varghese George , Sanjeev S. Jahagirdar , Deborah T. Marr
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Wesbter & Elliott LLP
- Main IPC: G06F15/80
- IPC: G06F15/80 ; G06F1/3206 ; G06F1/3293 ; G06F9/50 ; G06F1/3296 ; G06F13/40
Abstract:
A method is described that entails operating enabled cores of a multi-core processor such that both cores support respective software routines with a same instruction set, a first core being higher performance and consuming more power than a second core under a same set of applied supply voltage and operating frequency.
Public/Granted literature
- US20190073336A1 ASYMMETRIC PERFORMANCE MULTICORE ARCHITECTURE WITH SAME INSTRUCTION SET ARCHITECTURE Public/Granted day:2019-03-07
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