Display device with a plurality of memory selection line groups
Abstract:
A display device includes an array of sub-pixels, each of which include a memory to store sub-pixel data. The display device also includes a plurality of memory selection line groups respectively corresponding to the sub-pixel memories in rows of the array. The memory selection line groups are operated under control of a memory selection circuit, which outputs a memory selection signal based on a set value, thereby to perform sequential switching of memory selection lines. The sequential switching of the memory selection lines results in a sequential switching of the image being displayed.
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