Invention Grant
- Patent Title: Hardened safe stack for return oriented programming attack mitigation
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Application No.: US15629458Application Date: 2017-06-21
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Publication No.: US10795997B2Publication Date: 2020-10-06
- Inventor: Michael Lemay
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F21/56
- IPC: G06F21/56 ; G06F21/55 ; G06F21/52 ; G06F21/54

Abstract:
Techniques and computing devices for mitigating return-oriented programming (ROP) attacks are described. A hardened stack and an unhardened stack are provided. The hardened stack can include indications of return addresses while the unhardened stack can include all other memory allocations. A stack hardening instruction can be inserted before unhardened instructions (e.g., instructions that are themselves not authorized to access the hardened stack). The stack hardening instruction determines whether the unhardened instruction accessed memory outside the unhardened stack and generates a fault based on the determination. A register can be provided to include an indication of an address span of the unsafe stack. The stack hardening instruction can determine whether the unhardened instruction accessed a memory location outside the address range specified in the register and generate a fault accordingly.
Public/Granted literature
- US20180373871A1 HARDENED SAFE STACK FOR RETURN ORIENTED PROGRAMMING ATTACK MITIGATION Public/Granted day:2018-12-27
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