Invention Grant
- Patent Title: Scan testable through silicon VIAs
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Application No.: US16710717Application Date: 2019-12-11
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Publication No.: US10796974B2Publication Date: 2020-10-06
- Inventor: Lee D. Whetsel
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G01R31/28
- IPC: G01R31/28 ; H01L21/66 ; G01R31/3185 ; H01L23/48 ; H01L25/065
Abstract:
The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of die. The testing is facilitated by test circuitry associated with each type of TSV. The test circuitry includes a scan cell adapted for testing TSVs.
Public/Granted literature
- US20200118897A1 SCAN TESTABLE THROUGH SILICON VIAs Public/Granted day:2020-04-16
Information query
