Invention Grant
- Patent Title: Embedded chip package, manufacturing method thereof, and package-on-package structure
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Application No.: US16283657Application Date: 2019-02-22
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Publication No.: US10797017B2Publication Date: 2020-10-06
- Inventor: Po-Chen Lin , Ra-Min Tain , Chun-Hsien Chien , Chien-Chou Chen
- Applicant: Unimicron Technology Corp.
- Applicant Address: TW Taoyuan
- Assignee: Unimicron Technology Corp.
- Current Assignee: Unimicron Technology Corp.
- Current Assignee Address: TW Taoyuan
- Agency: JCIPRNET
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4f9b3b com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@6632c68b
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L23/52

Abstract:
An embedded chip package includes a circuit board, a chip, a dielectric material layer, and a build-up circuit structure. The circuit board includes a glass substrate and at least one conductive via. The glass substrate has a first surface, a second surface opposite the first surface, and a through-hole penetrating the glass substrate. The conductive via penetrates the glass substrate. The chip is disposed inside the through-hole. The dielectric material layer is filled inside the through-hole and covers the chip. The build-up circuit structure is disposed on the circuit board. The build-up circuit structure is electrically connected to the conductive via. A lower surface of the chip is exposed outside the dielectric material layer.
Public/Granted literature
- US20190295984A1 EMBEDDED CHIP PACKAGE, MANUFACTURING METHOD THEREOF, AND PACKAGE-ON-PACKAGE STRUCTURE Public/Granted day:2019-09-26
Information query
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