Invention Grant
- Patent Title: Power amplifier bias network implementation for improving linearity for wideband modulated signals
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Application No.: US16258145Application Date: 2019-01-25
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Publication No.: US10804858B2Publication Date: 2020-10-13
- Inventor: Samet Zihir , Himanshu Khatri , Tumay Kanar
- Applicant: Integrated Device Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Integrated Device Technology, Inc.
- Current Assignee: Integrated Device Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Christopher P. Maiorana, PC
- Main IPC: H03F3/04
- IPC: H03F3/04 ; H03F1/08 ; H03F3/24 ; H03F1/02
Abstract:
An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.
Public/Granted literature
- US20200244228A1 POWER AMPLIFIER BIAS NETWORK IMPLEMENTATION FOR IMPROVING LINEARITY FOR WIDEBAND MODULATED SIGNALS Public/Granted day:2020-07-30
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