Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US16419021Application Date: 2019-05-22
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Publication No.: US10892323B2Publication Date: 2021-01-12
- Inventor: Huang-Nan Chen , Ming-Chih Hsu
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: Winbond Electronics Corp.
- Current Assignee: Winbond Electronics Corp.
- Current Assignee Address: TW Taichung
- Agency: JCIPRNET
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L29/06 ; H01L21/033 ; H01L21/762 ; H01L27/108

Abstract:
A buried word line structure including a substrate, an isolation structure, and a buried word line is provided. The isolation structure is located in the substrate to define active regions separated from each other. The active regions extend in a first direction. The buried word line is located in the substrate. The buried word line extends through the isolation structure and the active regions in a second direction. The first direction intersects the second direction. The buried word line and the substrate are isolated from each other. The same buried word line includes a first portion and a second portion. The first portion is located in the active regions. The second portion is located in the isolation structure between two adjacent active regions in the first direction. A width of the first portion is greater than a width of the second portion.
Public/Granted literature
- US20200373386A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-11-26
Information query
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