NOR flash memory that includes three-dimensional memory cells is provided. In the NOR flash memory of the present disclosure, one memory cell includes one memory transistor and one selection transistor. A common source 5 is formed over a silicon substrate 9, and an active region 3 extending in a vertical direction to electrically connect to the common source 5 is formed. A control gate 4 of the memory transistor and a selection gate line 2 of the selection transistor are formed to surround a side portion of the active region 3, and a top portion of the active region 3 is electrically connected to a bit line 1.