Circuits are described that use metallization on both sides techniques to integrate two different types of non-volatile embedded memory devices within a single monolithic integrated circuit device. In an embodiment, a monolithic integrated circuit structure is provided that includes a device layer having one or more logic transistors. A front side interconnect layer is provided above the device layer, as seen in a vertical cross-section taken through the monolithic integrated circuit from top to bottom. A back side interconnect layer is provided below the device layer, as seen in the vertical cross-section. A first type of non-volatile memory device is provided in the front side interconnect layer, and a second type of non-volatile memory device different from the first type of non-volatile memory device is provided in the back side interconnect layer. A back side contact may be used to connect the device layer to a back side interconnect layer.