Invention Grant
- Patent Title: Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance
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Application No.: US16134526Application Date: 2018-09-18
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Publication No.: US10916638B2Publication Date: 2021-02-09
- Inventor: Kangguo Cheng , Shogo Mochizuki , Choonghyun Lee , Juntao Li
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Randall Bluestone
- Main IPC: H01L21/225
- IPC: H01L21/225 ; H01L21/324 ; H01L21/82 ; H01L21/28 ; H01L29/66 ; H01L21/768 ; H01L23/535 ; H01L29/08 ; H01L29/78
Abstract:
A method of forming a fin field effect device is provided. The method includes forming one or more vertical fins on a substrate and a fin template on each of the vertical fins. The method further includes forming a gate structure on at least one of the vertical fins, and a top spacer layer on the at least one gate structure, wherein at least an upper portion of the at least one of the one or more vertical fins is exposed above the top spacer layer. The method further includes forming a top source/drain layer on the top spacer layer and the exposed upper portion of the at least one vertical fin. The method further includes forming a sacrificial spacer on opposite sides of the fin templates and the top spacer layer, and removing a portion of the top source/drain layer not covered by the sacrificial spacer to form a top source/drain electrically connected to the vertical fins.
Public/Granted literature
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