Invention Grant
- Patent Title: Guided scanning electron microscopy metrology based on wafer topography
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Application No.: US15814884Application Date: 2017-11-16
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Publication No.: US10957608B2Publication Date: 2021-03-23
- Inventor: Arpit Yati , Shivam Agarwal , Jagdish Saraswatula , Andrew Cross
- Applicant: KLA-Tencor Corporation
- Applicant Address: US CA Milpitas
- Assignee: KLA-Tencor Corporation
- Current Assignee: KLA-Tencor Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Hodgson Russ LLP
- Priority: IN201741015075 20170428
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01J37/28 ; H01L21/67

Abstract:
A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.
Public/Granted literature
- US20180315670A1 Guided Metrology Based on Wafer Topography Public/Granted day:2018-11-01
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