Invention Grant
- Patent Title: Method for controlling transistor delay of nanowire or nanosheet transistor devices
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Application No.: US16898014Application Date: 2020-06-10
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Publication No.: US10991626B2Publication Date: 2021-04-27
- Inventor: Jeffrey Smith , Subhadeep Kal , Anton Devilliers
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L21/822
- IPC: H01L21/822 ; H01L21/8238 ; H01L29/423 ; H01L21/308 ; H01L21/306 ; H01L27/092 ; H01L29/06 ; H01L29/161 ; H01L29/10 ; H01L29/786 ; H01L27/06

Abstract:
A semiconductor device includes: a substrate having a planar surface; a first gate-all-around field effect transistor (GAA-FET) provided on said substrate and comprising a first channel having an untrimmed volume of first channel material corresponding to a volume of the first channel material within a first stacked fin structure from which the first channel was formed; and a second GAA-FET provided on said substrate and comprising a second channel having a trimmed volume of second channel material which is less than said untrimmed volume of first channel material by a predetermined trim amount corresponding to a delay adjustment of the second GAA-FET relative to the first GAA-FET, wherein said first and second GAA FETs are electrically connected as complementary FETs.
Public/Granted literature
- US20200303256A1 METHOD FOR CONTROLLING TRANSISTOR DELAY OF NANOWIRE OR NANOSHEET TRANSISTOR DEVICES Public/Granted day:2020-09-24
Information query
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