Invention Grant
- Patent Title: Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances
-
Application No.: US16462889Application Date: 2016-12-30
-
Publication No.: US10998260B2Publication Date: 2021-05-04
- Inventor: Han Wui Then , Sansaptak Dasgupta , Marko Radosavljevic , Sanaz K. Gardner
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2016/069620 WO 20161230
- International Announcement: WO2018/125239 WO 20180705
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/762 ; H01L21/764 ; H01L21/768 ; H01L29/06 ; H01L23/532
Abstract:
Embodiments of the invention include a microelectronic device that includes a substrate, at least one dielectric layer on the substrate and a plurality of conductive lines within the at least one dielectric layer. The microelectronic device also includes an air gap structure that is located below two or more of the plurality of conductive lines.
Public/Granted literature
Information query
IPC分类:
