Invention Grant
- Patent Title: Local interconnect for group IV source/drain regions
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Application No.: US16337794Application Date: 2016-10-28
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Publication No.: US10998270B2Publication Date: 2021-05-04
- Inventor: Seung Hoon Sung , Glenn A. Glass , Van H. Le , Ashish Agrawal , Benjamin Chu-Kung , Anand S. Murthy , Jack T. Kavalieros
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2016/059295 WO 20161028
- International Announcement: WO2018/080513 WO 20180503
- Main IPC: H01L23/535
- IPC: H01L23/535 ; H01L29/78 ; H01L29/417 ; H01L29/423 ; H01L27/092 ; H01L21/768 ; H01L21/8238

Abstract:
Techniques are disclosed for forming transistor devices having reduced interfacial resistance in a local interconnect. The local interconnect can be a material having similar composition to that of the source/drain material. That composition can be a metal alloy of a group IV element such as nickel germanide. The local interconnect of the semiconductor integrated circuit can function in the absence of barrier and liner layers. The devices can be used on MOS transistors including PMOS transistors.
Public/Granted literature
- US20200006229A1 LOCAL INTERCONNECT FOR GROUP IV SOURCE/DRAIN REGIONS Public/Granted day:2020-01-02
Information query
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