A method is presented for reducing parasitic capacitance. The method includes forming multi-layer spacers between source/drain regions, forming a dielectric liner over the multi-layer spacers and the source/drain regions, forming gate structures adjacent the multi-layer spacers, forming a self-aligned contact cap over the gate structures, and removing a sacrificial layer of each of the multi-layer spacers to form air-gaps between the gate structures and the source/drain regions.