Invention Grant
- Patent Title: Memory control circuit unit, storage device and method including selectively performing or ignoring commands in a command queue after a power glitch
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Application No.: US16048355Application Date: 2018-07-30
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Publication No.: US11023165B2Publication Date: 2021-06-01
- Inventor: Luong Khon
- Applicant: PHISON ELECTRONICS CORP.
- Applicant Address: TW Miaoli
- Assignee: PHISON ELECTRONICS CORP.
- Current Assignee: PHISON ELECTRONICS CORP.
- Current Assignee Address: TW Miaoli
- Agency: JCIPRNET
- Priority: TW107119008 20180601
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A memory management method for a memory storage device including a rewritable non-volatile memory (RNVM) module is provided. The memory management method includes: receiving a plurality of commands; detecting a power glitch; and sending a command sequence which instructs the (RNVM) module to perform a first operation according to a first command among the plurality of commands and to ignore a second command among the plurality of commands after the power glitch occurs. A command queue may be scanned, and scanning may be suspended and the command queue resumed if a first-type command, such as an erase command or a write command, is found, or scanning continued if a second-type command, such as a read command, is found. A memory control circuit unit may proceed with a programming operation if it determines a write command is a non-full sequential programming command. Other commands may be suspended after a programming operation is completed according to a specific mark in a full sequential programming command. Depending on whether a read DMA command is found when scanning the command queue, read commands may be selectively invalidated or sent to the rewritable non-volatile memory module.
Information query