Invention Grant
- Patent Title: Test device and test method of semiconductor storage device
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Application No.: US16813743Application Date: 2020-03-10
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Publication No.: US11037649B2Publication Date: 2021-06-15
- Inventor: Junichi Hirotsu , Daiki Ito
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: Winbond Electronics Corp.
- Current Assignee: Winbond Electronics Corp.
- Current Assignee Address: TW Taichung
- Agency: JCIPRNET
- Priority: JPJP2019-051018 20190319
- Main IPC: G11C29/50
- IPC: G11C29/50 ; G11C29/46 ; G11C7/10 ; G11C11/4074 ; G11C11/408 ; G11C11/4094

Abstract:
A test device capable of measuring characteristics of respective transistors constituting a memory cell is provided. The test device for testing a SRAM connects a resistor to a bit line on one side of a memory cell selected by a word line selection circuit and a bit line selection circuit of the SRAM. In a manner that a selected transistor and a resistor of the memory cell constitute a source follower circuit, the test device applies a voltage to each portion of the memory cell, applies an input voltage to a gate of the transistor constituting the source follower circuit, and inputs an output voltage outputted from a source of the transistor constituting the source follower circuit.
Public/Granted literature
- US20200303032A1 TEST DEVICE AND TEST METHOD OF SEMICONDUCTOR STORAGE DEVICE Public/Granted day:2020-09-24
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