Invention Grant
- Patent Title: Multiple reticle field semiconductor devices
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Application No.: US16611129Application Date: 2017-06-29
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Publication No.: US11043459B2Publication Date: 2021-06-22
- Inventor: Edward A. Burton , Mark T. Bohr , Murray Fitzpatrick Kelley , Shawn Michael Klauser
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2017/039990 WO 20170629
- International Announcement: WO2019/005068 WO 20190103
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L23/538 ; G03F7/20

Abstract:
Techniques are described for fabricating integrated circuit devices that span multiple reticle fields. Integrated circuits formed within separate reticle fields are placed into electrical contact with each other by overlapping reticle fields to form an overlapping conductive interconnect. This overlapping conductive interconnect electrically connects an interconnect layer of a first reticle field with an interconnect layer of a second, laterally adjacent reticle field. The overlapping conductive interconnection extends into a common scribe zone between adjacent reticle fields.
Public/Granted literature
- US20200066651A1 MULTIPLE RETICLE FIELD SEMICONDUCTOR DEVICES Public/Granted day:2020-02-27
Information query
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