Invention Grant
- Patent Title: Semiconductor nanowire device having cavity spacer and method of fabricating cavity spacer for semiconductor nanowire device
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Application No.: US16578004Application Date: 2019-09-20
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Publication No.: US11094831B2Publication Date: 2021-08-17
- Inventor: Rishabh Mehandru , Szuya S. Liao , Stephen M. Cea
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/423 ; H01L29/66 ; H01L29/06 ; H01L21/8238 ; H01L27/092 ; B82Y10/00 ; H01L29/775

Abstract:
Semiconductor nanowire devices having cavity spacers and methods of fabricating cavity spacers for semiconductor nanowire devices are described. For example, a semiconductor device includes a plurality of vertically stacked nanowires disposed above a substrate, each of the nanowires including a discrete channel region. A common gate electrode stack surrounds each of the discrete channel regions of the plurality of vertically stacked nanowires. A pair of dielectric spacers is on either side of the common gate electrode stack, each of the pair of dielectric spacers including a continuous material disposed along a sidewall of the common gate electrode and surrounding a discrete portion of each of the vertically stacked nanowires. A pair of source and drain regions is on either side of the pair of dielectric spacers.
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