Invention Grant
- Patent Title: Vertically stacked nanosheet CMOS transistor
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Application No.: US16691728Application Date: 2019-11-22
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Publication No.: US11121044B2Publication Date: 2021-09-14
- Inventor: Kangguo Cheng , Juntao Li , Zhenxing Bi
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Erik Johnson
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/84 ; H01L29/66 ; H01L27/092 ; H01L27/088 ; H01L29/78 ; H01L29/423 ; H01L29/06

Abstract:
Embodiments of the present invention are directed to techniques for generating vertically stacked nanosheet CMOS (Complementary Metal Oxide Semiconductor) transistor architectures. In a non-limiting embodiment of the invention, a first rare earth oxide layer is formed over a substrate. An n-FET nanosheet stack is formed on the rare earth oxide layer. The n-FET nanosheet stack includes a first nanosheet. A second rare earth oxide layer is formed on the n-FET nanosheet stack. A p-FET nanosheet stack is formed on the second rare earth oxide layer. The p-FET nanosheet stack includes a second nanosheet.
Information query
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