Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US16808180Application Date: 2020-03-03
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Publication No.: US11152484B2Publication Date: 2021-10-19
- Inventor: Purakh Raj Verma , Kuo-Yuh Yang
- Applicant: United Microelectronics Corp.
- Applicant Address: TW Hsinchu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Priority: CN201810686336.6 20180628
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/768 ; H01L27/12 ; H01L29/06

Abstract:
A semiconductor structure including a substrate, a CMOS device and a BJT is provided. The substrate has a first side and a second side opposite to each other. The CMOS device includes an NMOS transistor and a PMOS transistor. The NMOS transistor includes a first N-type doped region and a second N-type doped region disposed in the substrate. The PMOS transistor includes a first P-type doped region and a second P-type doped region disposed in the substrate. The BJT includes a collector, a base and an emitter. The base is disposed on the first side of the substrate. The emitter is disposed on the base. A first metal silicide layer, a second metal silicide layer, and a third metal silicide layer are respectively located on the second side of the substrate and respectively disposed on the collector, the first N-type doped region, and the first P-type doped region.
Information query
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