Invention Grant
- Patent Title: Gallium nitride (GaN) transistor structures on a substrate
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Application No.: US15576508Application Date: 2015-06-26
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Publication No.: US11195944B2Publication Date: 2021-12-07
- Inventor: Han Wui Then , Sansaptak Dasgupta , Sanaz K. Gardner , Marko Radosavljevic , Seung Hoon Sung , Robert S. Chau
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2015/037987 WO 20150626
- International Announcement: WO2016/209263 WO 20161229
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/20 ; H01L29/78 ; H01L21/762 ; H01L29/786 ; H01L29/66 ; H01L29/423 ; H01L29/775

Abstract:
Techniques are disclosed for gallium nitride (GaN) oxide isolation and formation of GaN transistor structures on a substrate. In some cases, the GaN transistor structures can be used for system-on-chip integration of high-voltage GaN front-end radio frequency (RF) switches on a bulk silicon substrate. The techniques can include, for example, forming multiple fins in a substrate, depositing the GaN layer on the fins, oxidizing at least a portion of each fin in a gap below the GaN layer, and forming one or more transistors on and/or from the GaN layer. In some cases, the GaN layer is a plurality of GaN islands, each island corresponding to a given fin. The techniques can be used to form various non-planar isolated GaN transistor architectures having a relatively small form factor, low on-state resistance, and low off-state leakage, in some cases.
Public/Granted literature
- US20180175184A1 GALLIUM NITRIDE (GaN) TRANSISTOR STRUCTURES ON A SUBSTRATE Public/Granted day:2018-06-21
Information query
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