Invention Grant
- Patent Title: Interposer for electrically connecting stacked integrated circuit device packages
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Application No.: US16633136Application Date: 2017-09-21
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Publication No.: US11211314B2Publication Date: 2021-12-28
- Inventor: Hyoung Il Kim , Yi Xu
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP.
- International Application: PCT/US2017/052802 WO 20170921
- International Announcement: WO2019/059913 WO 20190328
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L23/00 ; H01L25/065

Abstract:
An integrated circuit structure may be fabricated having a first integrated circuit package comprising a first integrated circuit device electrically attached to a first surface of a first substrate, a second integrated circuit package comprising a second integrated circuit device electrically attached to a first surface of a second substrate and an opening extending between a first surface of the second substrate and the second surface of the second substrate, and an interconnection structure electrically attached to the first surface of the first substrate, wherein a portion of the interconnection structure extends into the second substrate opening and wherein the interconnection structure is electrically attached to a first surface of the second substrate.
Public/Granted literature
- US20200152558A1 INTERPOSER FOR ELECTRICALLY CONNECTING STACKED INTEGRATED CIRCUIT DEVICE PACKAGES Public/Granted day:2020-05-14
Information query
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