Invention Grant
- Patent Title: Failure prevention of chip power network
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Application No.: US16808693Application Date: 2020-03-04
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Publication No.: US11270768B2Publication Date: 2022-03-08
- Inventor: Zheng Xu , Kangguo Cheng , Dexin Kong , Juntao Li
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Robert Sullivan
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C13/00 ; H01L23/528 ; H01L23/525 ; H01L23/62

Abstract:
A semiconductor structure is provided. The structure includes a RRAM cell having a first end and a second end. The second end is connected to a first potential. The structure includes a decoupling capacitor having a first end connected in series with the first end of the RRAM cell and a second end connected to a second potential. The structure includes a FET arranged across the capacitor to form a bridged capacitor by having a FET source connected to the first end of the capacitor and a FET drain connected to the second end of the capacitor. A paired activation and subsequent deactivation of the FET enables a short protection mode of the capacitor that provides a series resistance above a threshold amount, between the second potential and the first end of the RRAM cell, responsive to a detected short of the capacitor from the supply to the first potential.
Public/Granted literature
- US20210280514A1 FAILURE PREVENTION OF CHIP POWER NETWORK Public/Granted day:2021-09-09
Information query