Invention Grant
- Patent Title: Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches
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Application No.: US16914338Application Date: 2020-06-27
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Publication No.: US11321089B2Publication Date: 2022-05-03
- Inventor: Saurabh Gupta , Niranjan Soundararajan , Ragavendra Natarajan , Sreenivas Subramoney
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Priority: IN202041016867 20200420
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38

Abstract:
Methods and apparatuses relating to instruction set architecture (ISA) based and automatic load tracking hardware for opportunistic re-steer of data-dependent flaky branches are described. In one embodiment, a processor includes a pipeline circuit comprising a decoder to decode instructions into decoded instructions and an execution circuit to execute the decoded instructions, a branch predictor circuit to generate a predicted path for a branch instruction, and a branch re-steer circuit to, for the branch instruction dependent on a result from a load instruction, check if an instruction received by the pipeline circuit is the load instruction, and when the instruction received by the pipeline circuit is the load instruction, check for a write back of the result from the load instruction between a decode of the branch instruction with the decoder and an execution of the branch instruction with the execution circuit, and when the predicted path differs from a path based on the result from the load instruction, re-steer the branch instruction in the pipeline circuit to the path and cause execution of the branch instruction for the path based on the result from the load instruction.
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