Invention Grant
- Patent Title: Package with a highly conductive layer deposited on die using throughput additive deposition prior to TIM1 dispense
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Application No.: US16639545Application Date: 2017-09-30
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Publication No.: US11328978B2Publication Date: 2022-05-10
- Inventor: Feras Eid , Johanna M. Swan , Sergio Chan Arguedas , John J. Beatty
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- International Application: PCT/US2017/054676 WO 20170930
- International Announcement: WO2019/066992 WO 20190404
- Main IPC: H01L23/367
- IPC: H01L23/367 ; H01L21/48 ; H01L49/02 ; H01L23/00 ; H01L23/10

Abstract:
A device package and a method of forming a device package are described. The device package has dies disposed on a substrate, and one or more layers with a high thermal conductivity, referred to as the highly-conductive (HC) intermediate layers, disposed on the dies on the substrate. The device package further includes a lid with legs on an outer periphery of the lid, a top surface, and a bottom surface. The legs of the lid are attached to the substrate with a sealant. The bottom surface of the lid is disposed over the one or more HC intermediate layers and the one or more dies on the substrate. The device package may also include thermal interface materials (TIMs) disposed on the HC intermediate layers. The TIMs may be disposed between the bottom surface of the lid and one or more top surfaces of the HC intermediate layers.
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Information query
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