- Patent Title: Self-aligned gate endcap (SAGE) architecture having endcap plugs
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Application No.: US15943552Application Date: 2018-04-02
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Publication No.: US11329138B2Publication Date: 2022-05-10
- Inventor: Sairam Subramanian , Christopher Kenyon , Sridhar Govindaraju , Chia-Hong Jan , Mark Liu , Szuya S. Liao , Walid M. Hafez
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/762 ; H01L21/768 ; H01L21/8238 ; H01L27/092 ; H01L29/06 ; H01L21/8234 ; H01L27/088

Abstract:
Self-aligned gate endcap (SAGE) architectures having gate endcap plugs or contact endcap plugs, or both gate endcap plugs and contact endcap plugs, and methods of fabricating SAGE architectures having such endcap plugs, are described. In an example, a first gate structure is over a first of a plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A first gate endcap isolation structure is laterally between and in contact with the first gate structure and the second gate structure and has an uppermost surface co-planar with an uppermost surface of the first gate structure and the second gate structure. A second gate endcap isolation structure is laterally between and in contact with first and second lateral portions of the first gate structure and has an uppermost surface below an uppermost surface of the first gate structure.
Public/Granted literature
- US20190305111A1 SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING ENDCAP PLUGS Public/Granted day:2019-10-03
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