Invention Grant
- Patent Title: Methods of hardware and software coordinated opt-in to advanced features on hetero ISA platforms
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Application No.: US16586706Application Date: 2019-09-27
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Publication No.: US11409572B2Publication Date: 2022-08-09
- Inventor: Toby Opferman , Eliezer Weissmann , Robert Valentine , Russell Cameron Arnold
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F9/50
- IPC: G06F9/50 ; G06F9/38 ; G06F9/48 ; G06F9/30 ; G06F9/448
Abstract:
The present disclosure relates to a processor that includes one or more processing elements associated with one or more instruction set architectures. The processor is configured to receive a request from an application executed by a first processing element of the one or more processing elements to enable a feature associated with an instruction set architecture. Additionally, the processor is configured to enable the application to utilize the feature without a system call occurring when the feature is associated with an instruction set architecture associated with the first processing element.
Public/Granted literature
- US20210096908A1 Methods of Hardware and Software Coordinated Opt-In to Advanced Features on Hetero ISA Platforms Public/Granted day:2021-04-01
Information query
