Invention Grant
- Patent Title: Double gated thin film transistors
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Application No.: US16022480Application Date: 2018-06-28
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Publication No.: US11411119B2Publication Date: 2022-08-09
- Inventor: Aaron Lilak , Van H. Le , Abhishek A. Sharma , Tahir Ghani , Rishabh Mehandru , Gilbert Dewey , Willy Rachmady
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/423

Abstract:
Double gated thin film transistors are described. In an example, an integrated circuit structure includes an insulator layer above a substrate. A first gate electrode is on the insulator layer, the first gate electrode having a non-planar feature. A first gate dielectric is on and conformal with the non-planar feature of the first gate electrode. A channel material layer is on and conformal with the first gate dielectric. A second gate dielectric is on and conformal with the channel material layer. A second gate electrode is on and conformal with the second gate dielectric. A first source or drain region is coupled to the channel material layer at a first side of the first gate dielectric. A second source or drain region is coupled to the channel material layer at a second side of the first gate dielectric.
Public/Granted literature
- US20200006573A1 DOUBLE GATED THIN FILM TRANSISTORS Public/Granted day:2020-01-02
Information query
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