Invention Grant
- Patent Title: Selective metal deposition by patterning direct electroless metal plating
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Application No.: US16269357Application Date: 2019-02-06
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Publication No.: US11501967B2Publication Date: 2022-11-15
- Inventor: Suddhasattwa Nad , Roy Dittler , Darko Grujicic , Marcel Wall , Rahul Manepalli
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/285 ; H01L21/768

Abstract:
Embodiments include package substrates and a method of forming the package substrates. A package substrate includes a self-assembled monolayer (SAM) layer over a first dielectric, where the SAM layer includes first end groups and second end groups. The second end groups may include a plurality of hydrophobic moieties. The package substrate also includes a conductive pad on the first dielectric, where the conductive pad has a bottom surface, a top surface, and a sidewall, and where the SAM layer surrounds and contacts a surface of the sidewall of the conductive pad. The hydrophobic moieties may include fluorinated moieties. The conductive pad includes a copper material, where the top surface of the conductive pad has a surface roughness that is approximately equal to a surface roughness of the as-plated copper material. The SAM layer may have a thickness that is approximately 0.1 nm to 20 nm.
Public/Granted literature
- US20200251332A1 SELECTIVE METAL DEPOSITION BY PATTERNING DIRECT ELECTROLESS METAL PLATING Public/Granted day:2020-08-06
Information query
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