Invention Grant
- Patent Title: Asymmetric cored integrated circuit package supports
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Application No.: US16202690Application Date: 2018-11-28
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Publication No.: US11552008B2Publication Date: 2023-01-10
- Inventor: Lauren Ashley Link , Andrew James Brown , Prithwish Chatterjee , Sai Vadlamani , Ying Wang , Chong Zhang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Akona IP PC
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/64 ; H01L23/15

Abstract:
Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.
Public/Granted literature
- US20200168536A1 ASYMMETRIC CORED INTEGRATED CIRCUIT PACKAGE SUPPORTS Public/Granted day:2020-05-28
Information query
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