- Patent Title: Source or drain structures with phosphorous and arsenic co-dopants
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Application No.: US16367134Application Date: 2019-03-27
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Publication No.: US11552169B2Publication Date: 2023-01-10
- Inventor: Anand Murthy , Ryan Keech , Nicholas G. Minutillo , Suresh Vishwanath
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/167 ; H01L29/66 ; H01L29/417 ; H01L27/088 ; H01L29/08

Abstract:
Integrated circuit structures having source or drain structures with phosphorous and arsenic co-dopants are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. The first and second source or drain structures include silicon, phosphorous and arsenic, with an atomic concentration of phosphorous substantially the same as an atomic concentration of arsenic.
Public/Granted literature
- US20200312958A1 SOURCE OR DRAIN STRUCTURES WITH PHOSPHOROUS AND ARSENIC CO-DOPANTS Public/Granted day:2020-10-01
Information query
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