Invention Grant
- Patent Title: Systems and methods for detecting faults in an analog input/output circuitry
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Application No.: US17231642Application Date: 2021-04-15
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Publication No.: US11561255B2Publication Date: 2023-01-24
- Inventor: Kumar Abhishek , Xiankun Jin , Srikanth Jagannathan
- Applicant: NXP USA, Inc.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G01R31/28
- IPC: G01R31/28 ; H03K3/037

Abstract:
An integrated circuit includes an input/output (I/O) circuit configured to receive a first signal and a second signal and a fault detection circuit. The I/O circuit includes an I/O terminal, an I/O buffer, and a pull resistor having a first terminal coupled to the I/O terminal. The fault detection circuit is configured to determine whether a predetermined number of toggles of the first signal occurs while the second signal is held at a constant logic state, assert a fault indicator when the predetermined number of toggles occurs, and negate the fault indicator when the predetermined number of toggles does not occur.
Public/Granted literature
- US20220334176A1 SYSTEMS AND METHODS FOR DETECTING FAULTS IN AN ANALOG INPUT/OUTPUT CIRCUITRY Public/Granted day:2022-10-20
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