Invention Grant
- Patent Title: System and method for inspecting a wafer
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Application No.: US16712397Application Date: 2019-12-12
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Publication No.: US11561480B2Publication Date: 2023-01-24
- Inventor: Ivo Liebregts , Niladri Sen , Koen Thuijs , Ronaldus Johannes Gysbertus Goossens
- Applicant: ASML NETHERLANDS B.V.
- Applicant Address: NL Veldhoven
- Assignee: ASML NETHERLANDS B.V.
- Current Assignee: ASML NETHERLANDS B.V.
- Current Assignee Address: NL Veldhoven
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Main IPC: G03F7/20
- IPC: G03F7/20

Abstract:
A computer-implemented defect prediction method for a device manufacturing process involving processing a pattern onto a substrate. Non-correctable error is used to help predict locations where defects are likely to be present, allowing improvements in metrology throughput. In an embodiment, non-correctable error information relates to imaging error due to limitations on, for example, the lens hardware, imaging slit size, and/or other physical characteristics of the lithography system. In an embodiment, non-correctable error information relates to imaging error induced by lens heating effects.
Public/Granted literature
- US20200209761A1 SYSTEM AND METHOD FOR INSPECTING A WAFER Public/Granted day:2020-07-02
Information query
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