Invention Grant
- Patent Title: Host clock effective delay range extension
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Application No.: US17331281Application Date: 2021-05-26
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Publication No.: US11573702B2Publication Date: 2023-02-07
- Inventor: Claudio Giaccio , Erminio Di Martino , Jeffery Carlos Bell
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F1/12
- IPC: G06F1/12 ; G06F1/04 ; G06F3/06 ; G06F11/10

Abstract:
Devices and techniques are disclosed herein to extend a range of an effective delay of a delay circuit having a configurable delay limited to a first range of delay values with respect to a first edge of a clock signal. A selection circuit can selectively apply the configurable delay to a subsequent, second edge of the clock signal to extend the range of the effective delay of the delay circuit beyond the first range of delay values.
Public/Granted literature
- US20210286516A1 HOST CLOCK EFFECTIVE DELAY RANGE EXTENSION Public/Granted day:2021-09-16
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