Invention Grant
- Patent Title: Openings layout of three-dimensional memory device
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Application No.: US17017417Application Date: 2020-09-10
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Publication No.: US11574919B2Publication Date: 2023-02-07
- Inventor: Jia He , Haihui Huang , Fandong Liu , Yaohua Yang , Peizhen Hong , Zhiliang Xia , Zongliang Huo , Yaobin Feng , Baoyou Chen , Qingchen Cao
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Hubei
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Hubei
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Priority: CN201710134033.9 20170307
- Main IPC: H01L27/1157
- IPC: H01L27/1157 ; H01L27/11578 ; H01L29/66 ; H01L29/792 ; H01L21/28 ; H01L27/11582

Abstract:
Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.
Public/Granted literature
- US20210151458A1 Openings Layout of Three-Dimensional Memory Device Public/Granted day:2021-05-20
Information query
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