Invention Grant
- Patent Title: Page policies for signal development caching in a memory device
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Application No.: US17414823Application Date: 2019-12-20
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Publication No.: US11669278B2Publication Date: 2023-06-06
- Inventor: Dmitri A. Yudanov , Shanky Kumar Jain
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- International Application: PCT/US2019/067832 2019.12.20
- International Announcement: WO2020/132430A 2020.06.25
- Date entered country: 2021-06-16
- Main IPC: G11C11/4091
- IPC: G11C11/4091 ; G06F3/06 ; G11C11/22 ; G06F12/0875 ; G11C7/08 ; G11C7/10 ; G11C11/4074 ; G11C11/408 ; G11C11/4096 ; G06F9/54 ; G06F12/02 ; G06F12/0873 ; G06F12/0893 ; G06F12/1045 ; G11C11/406 ; G11C8/08 ; G06F12/0802

Abstract:
Methods, systems, and devices related to page policies for signal development caching in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory array, a sense amplifier array, and a signal development cache configured to store signals (e.g., cache signals, signal states) associated with logic states (e.g., memory states) that may be stored at the memory array (e.g., according to various read or write operations). The memory device may be configured to receive a read command for data stored in the memory array and transfer the data from the memory array to the signal development cache. The memory device may be configured to sense the data using an array of sense amplifiers. The memory device may be configured to write the data from the signal development cache back to the memory array based on one or more policies.
Public/Granted literature
- US20220020414A1 PAGE POLICIES FOR SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE Public/Granted day:2022-01-20
Information query
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