Invention Grant
- Patent Title: III-N nanostructures formed via cavity fill
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Application No.: US16636760Application Date: 2017-09-26
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Publication No.: US11670686B2Publication Date: 2023-06-06
- Inventor: Marko Radosavljevic , Sansaptak Dasgupta , Han Wui Then
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Akona IP
- International Application: PCT/US2017/053348 2017.09.26
- International Announcement: WO2019/066766A 2019.04.04
- Date entered country: 2020-02-05
- Main IPC: H01L29/20
- IPC: H01L29/20 ; H01L21/02 ; H01L29/66 ; H01L29/778 ; H01L29/775 ; H01L29/78

Abstract:
A method for forming III-N structures of desired nanoscale dimensions is disclosed. The method is based on, first, providing a material to serve as a shell inside which a cavity can be formed, followed by using epitaxial growth to fill the cavity with III-N semiconductor(s). Filling a cavity of specified shape and dimensions with a III-N semiconductor results in formation of a III-N structure which has shape and dimensions defined by those of the cavity in the shell, advantageously enabling formation of III-N structures on a nanometer scale without having to rely on etching of III-N materials. Ensuring that at least a part of the III-N material in the cavity is formed by lateral epitaxial overgrowth allows obtaining high quality III-N semiconductor in that part without having to grow a thick layer. Disclosed III-N nanostructures can serve as foundation for fabricating III-N device components, e.g. III-N transistors, having non-planar architecture.
Public/Granted literature
- US20200168708A1 III-N NANOSTRUCTURES FORMED VIA CAVITY FILL Public/Granted day:2020-05-28
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