Invention Grant
- Patent Title: Semiconductor memory structure and method for manufacturing the same
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Application No.: US17320633Application Date: 2021-05-14
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Publication No.: US11700724B2Publication Date: 2023-07-11
- Inventor: Hung-Yu Wei
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee Address: TW Taichung
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01B12/00
- IPC: H01B12/00 ; H10B12/00 ; H01L29/06

Abstract:
A semiconductor structure includes a semiconductor substrate including a first active region and a chop region. The semiconductor structure also includes a source/drain region disposed in the first active region, an isolation structure disposed in the chop region, and a gate structure extending at least across the isolation structure in the chop region. The gate structure includes a gate electrode layer and a gate lining layer lining on the gate electrode layer. The gate lining layer includes a first portion having an upper surface that is lower than a bottom surface of the source/drain region.
Public/Granted literature
- US20220367475A1 SEMICONDUCTOR MEMORY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2022-11-17
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