Invention Grant
- Patent Title: Methods and apparatus to form silicon-based transistors on group III-nitride materials using aspect ratio trapping
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Application No.: US17526562Application Date: 2021-11-15
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Publication No.: US11715799B2Publication Date: 2023-08-01
- Inventor: Marko Radosavljevic , Sansaptak Dasgupta , Han Wui Then
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L21/8258 ; H01L27/092 ; H01L27/06 ; H01L29/66 ; H01L29/10 ; H01L29/20
Abstract:
Methods and apparatus to form silicon-based transistors on group III-nitride materials using aspect ratio trapping are disclosed. An example integrated circuit includes a group III-nitride substrate and a fin of silicon formed on the group III-nitride substrate. The integrated circuit further includes a first transistor formed on the fin of silicon and a second transistor formed on the group III-nitride substrate.
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