Circuit assembly for neutral point clamped inverters that are protected from incorrect commutations
Abstract:
A neutral point clamped inverter with an upper half-bridge and a lower half-bridge, wherein each half-bridge has an inner transistor and an outer transistor, where the inner transistor of the upper half-bridge is configured to interact with the outer transistor of the upper half-bridge such that a signal that reproduces the switch state of the inner transistor is coupled into an actuation circuit for switching the outer transistor and influences the switch state of the outer transistor.
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