Invention Grant
- Patent Title: Semiconductor device including vertical wire bonds
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Application No.: US17137990Application Date: 2020-12-30
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Publication No.: US11749647B2Publication Date: 2023-09-05
- Inventor: Xiaofeng Di , Junrong Yan , CheeKeong Chin , Weili Wang , Xin Lu , Qi Deng , Chaur Yang Ng , Cong Zhang , Chenlin Yang , Chin-Tien Chiu
- Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vierra Magen Marcus LLP
- Priority: CN 2010441574.8 2020.05.22
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00

Abstract:
A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.
Public/Granted literature
- US20210366875A1 SEMICONDUCTOR DEVICE INCLUDING VERTICAL WIRE BONDS Public/Granted day:2021-11-25
Information query
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