Invention Grant
- Patent Title: Semiconductor memory device and error detection and correction method
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Application No.: US17673825Application Date: 2022-02-17
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Publication No.: US11755209B2Publication Date: 2023-09-12
- Inventor: Takamichi Kasai , Fujimi Kaneko
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: Winbond Electronics Corp.
- Current Assignee: Winbond Electronics Corp.
- Current Assignee Address: TW Taichung
- Agency: JCIPRNET
- Priority: JP 21036890 2021.03.09
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F11/10

Abstract:
An error detection and correction method for a flash memory includes: a setting step, setting selection information to select a first error detection and correction function for performing 1-bit error detection and correction or a second error detection and correction function for performing multiple-bit error detection and correction; and an executing step, performing the first error detection and correction function or the second error detection and correction function based on the selection information during a read operation or a write operation.
Public/Granted literature
- US20220291845A1 SEMICONDUCTOR MEMORY DEVICE AND ERROR DETECTION AND CORRECTION METHOD Public/Granted day:2022-09-15
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