Invention Grant
- Patent Title: Through via structure and method
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Application No.: US16927249Application Date: 2020-07-13
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Publication No.: US11756883B2Publication Date: 2023-09-12
- Inventor: Yung-Chi Lin , Hsin-Yu Chen , Lin-Chih Huang , Tsang-Jiuh Wu , Wen-Chih Chiou
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- The original application number of the division: US13619233 2012.09.14
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L27/088 ; H01L23/31 ; H01L23/48 ; H01L23/532 ; H01L23/00 ; H01L21/768 ; H01L23/525

Abstract:
A method comprises forming a trench extending through an interlayer dielectric layer over a substrate and partially through the substrate, depositing a photoresist layer over the trench, wherein the photoresist layer partially fills the trench, patterning the photoresist layer to remove the photoresist layer in the trench and form a metal line trench over the interlayer dielectric layer, filling the trench and the metal line trench with a conductive material to form a via and a metal line, wherein an upper portion of the trench is free of the conductive material and depositing a dielectric material over the substrate, wherein the dielectric material is in the upper portion of the trench.
Public/Granted literature
- US20200343176A1 Through Via Structure and Method Public/Granted day:2020-10-29
Information query
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