Invention Grant
- Patent Title: Systems and methods for break out of interconnections for high-density integrated circuit packages on a multi-layer printed circuit board
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Application No.: US17503988Application Date: 2021-10-18
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Publication No.: US11778731B2Publication Date: 2023-10-03
- Inventor: Thanh Tran , David G. Haedge , Alton Moore , Paul Ingerson
- Applicant: Raytheon Company
- Applicant Address: US MA Waltham
- Assignee: RAYTHEON COMPANY
- Current Assignee: RAYTHEON COMPANY
- Current Assignee Address: US MA Waltham
- Agency: Burns & Levinson, LLP
- Agent Joseph M. Maraia
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/11 ; H05K1/18

Abstract:
A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.
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