Invention Grant
- Patent Title: Glass dielectric layer with patterning
-
Application No.: US16574252Application Date: 2019-09-18
-
Publication No.: US11780210B2Publication Date: 2023-10-10
- Inventor: Jieying Kong , Gang Duan , Srinivas Pietambaram , Patrick Quach , Dilan Seneviratne
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; B32B17/10 ; B32B15/20 ; H01L23/00 ; H01L23/48

Abstract:
Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes directed to a manufacturing process flow for packages that include one or more glass layers that include patterning features, such as electrically conductive traces, RDLs, and vias within the packages. In embodiments, a package may include a glass layer with a first side and a second side opposite the first side, where the glass layer is a dielectric layer. The package may include another layer coupled with the first side of the glass layer, and a pattern on the second side of the glass layer to receive a deposited material in at least a portion of the pattern.
Public/Granted literature
- US20210078296A1 GLASS DIELECTRIC LAYER WITH PATTERNING Public/Granted day:2021-03-18
Information query
IPC分类: